16 inputs at 50 MHz (and lower sample speed, division by 2 ... 256)
8 inputs at 100 MHz
4 inputs at 200 MHz
16 inputs - sampling on change of an input signal (asynchronous clock) - trailing, falling or both edges, max. clock speed is 40 MHz at 1:1 duty
15 inputs + 1 synchronous clock input (trailing or falling edge), max. clock speed is 49.9 MHz
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